Lv H B et al 2017 BEOL based RRAM with one extra-mask for low cost, highly reliable embedded application in 28 nm node and beyond 2017 IEEE Int. Electron Devices Meeting (IEDM) (IEEE) pp 2.4.1-4 |
McLellan P 2023 TSMC technology roadmap, 2023 version (available at:https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/posts/tsmc-ts2023) |
Lee C F, Lin H J, Lien C W, Chih Y D and Chang J 2017 A 1.4Mb 40-nm embedded ReRAM macro with 0.07um2 bit cell, 2.7mA/100MHz low-power read and hybrid write verify for high endurance application 2017 IEEE Asian Solid-State Circuits Conf. (A-SSCC) (IEEE) pp 9-12 |
Chiu Y C et al 2019 A 40nm 2Mb ReRAM macro with 85% reduction in forming time and 99% reduction in page-write time using auto-forming and auto-write schemes 2019 Symp. on VLSI Technology (IEEE) pp T232-3 |
Golonzka O et al 2019 Non-volatile RRAM embedded into 22FFL FinFET technology 2019 Symp. on VLSI Technology (IEEE) pp T230-1 |
Chang Y F, O'Donnell J A, Acosta T, Kotlyar R, Chen A, Quintero P A, Strutt N, Golonzka O, Connor C and Hicks J 2020 eNVM RRAM reliability performance and modeling in 22FFL FinFET technology 2020 IEEE Int. Reliability Physics Symp. (IRPS) (IEEE) pp 1-4 |
WeebitNano 2021 Weebit demonstrates successful scaling of its ReRAM technology to 28nm (available at:www. weebit-nano.com/wp-content/uploads/2021/10/WeebitNano-demonstrates-successful-scaling-of-its-ReRAMtechnology-to-28nm.pdf) |
Brown P 2020 Dialog licenses resistive RAM technology to Globalfoundries (available at:https://electronics360.globalspec.com/article/15847/dialog-licenses-resistiveram-technology-to-globalfoundries) |
Panasonic 2013 Panasonic starts world's first mass production of ReRAM mounted microcomputers (available at:https://news.panasonic.com/global/press/en130730-2) |
Dillinger T 2022 TSMC 2022 technology symposium review-process technology development (available at:https://semiwiki.com/semiconductor-manufacturers/tsmc/314415-tsmc-2022-technology-symposium-reviewprocess-technology-development/) |
Wang G R, Hou H Y, Yan Y F, Jagatramka R, Shirsalimian A, Wang Y F, Li B Z, Daly M and Cao C H 2023 Recent advances in the mechanics of 2D materials Int. J. Extrem. Manuf. 5032002 |
Marinissen E J, Prince B, Keltel-Schulz D and Zorian Y 2005 Challenges in embedded memory design and test Design, Automation and Test in Europe (IEEE) pp 722-7 |
Kim S K and Popovici M 2018 Future of dynamic random-access memory as main memory MRS Bull. 43334-9 |
El-Kareh B, Bronner G B and Schuster S E 1997 The evolution of DRAM cell technology Solid State Technol. 4089-101 |
Molas G and Nowak E 2021 Advances in emerging memory technologies:from data storage to artificial intelligence Appl. Sci. 1111254 |
Umemoto Y et al 201428 nm 50% power-reducing contacted mask read only memory macro with 0.72-ns read access time using 2T pair bitcell and dynamic column source bias control technique IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 22575-84 |
Vujisic M, Osmokrovic P and Loncar B 2007 Gamma irradiation effects in programmable read only memories J. Phys. D:Appl. Phys. 405785-9 |
Lee K H, Wang S C and King Y C 2005 Self-convergent scheme for logic-process-based multilevel/analog memory IEEE Trans. Electron Devices 522676-81 |
Kim H, Ahn S J, Shin Y G, Lee K and Jung E 2017 Evolution of NAND flash memory:from 2D to 3D as a storage market leader 2017 IEEE Int. Memory Workshop (IMW) (IEEE) pp 1-4 |
Kim S S, Yong S K, Kim W, Kang S, Park H W, Yoon K J, Sheen D S, Lee S and Hwang C S 2023 Review of semiconductor flash memory devices for material and process issues Adv. Mater. 352200659 |
Bez R, Camerlenghi E, Modelli A and Visconti A 2003 Introduction to flash memory Proc. IEEE 91489-502 |
Pan F, Gao S, Chen C, Song C and Zeng F 2014 Recent progress in resistive random access memories:materials, switching mechanisms, and performance Mater. Sci. Eng. R 831-59 |
Compagnoni C M, Goda A, Spinelli A S, Feeley P, Lacaita A L and Visconti A 2017 Reviewing the evolution of the NAND flash technology Proc. IEEE 1051609-33 |
Scott J F and De Araujo C A P 1989 Ferroelectric memories Science 2461400-5 |
Tehrani S, Slaughter J M, Chen E, Durlam M, Shi J and DeHerren M 1999 Progress and outlook for MRAM technology IEEE Trans. Magn. 352814-9 |
Wuttig M and Yamada N 2007 Phase-change materials for rewriteable data storage Nat. Mater. 6824-32 |
Xie Y 2011 Modeling, architecture, and applications for emerging memory technologies IEEE Des. Test Comput. 2844-51 |
Dor O B, Yochelis S, Mathew S P, Naaman R and Paltiel Y 2013 A chiral-based magnetic memory device without a permanent magnet Nat. Commun. 42256 |
Maffitt T M, DeBrosse J K, Gabric J A, Gow E T, Lamorey M C, Parenteau J S, Willmott D R, Wood M A and Gallagher W J 2006 Design considerations for MRAM IBM J. Res. Dev. 5025-39 |
Oh S C 2013 Challenges of STT-MRAM for high density memory ECS Meeting Abstracts (IOP Publishing) |
Shihab M M, Zhang J, Gao S W, Sloan J and Jung M 2016 Couture:tailoring STT-MRAM for persistent main memory 4th Workshop on Interactions of NVM/Flash with Operating Systems and Workloads (INFLOW 16) (OSDI) |
YUMPU 2015 Future Non-volatile Memory Technologies (available at:www.yumpu.com/en/document/view/37367273/future-non-volatile-memory-technologies/14) |
Gallagher W J et al 2019 Recent progress and next directions for embedded MRAM technology 2019 Symp. on VLSI Technology (IEEE) pp T190-1 |
Lee K and Kang S H 2011 Development of embedded STT-MRAM for mobile system-on-chips IEEE Trans. Magn. 47131-6 |
Auciello O, Scott J F and Ramesh R 1998 The physics of ferroelectric memories Phys. Today 5122-27 |
Setter N et al 2006 Ferroelectric thin films:review of materials, properties, and applications J. Appl. Phys. 100051606 |
Fontanini R et al 2022 Interplay between charge trapping and polarization switching in BEOL-compatible bilayer ferroelectric tunnel junctions IEEE J. Electron Devices Soc. 10593-9 |
Park J Y et al 2023 Revival of ferroelectric memories based on emerging fluorite-structured ferroelectrics Adv. Mater. 352204904 |
Okuno J et al 2021 High-endurance and low-voltage operation of 1T1C FeRAM arrays for nonvolatile memory application 2021 IEEE Int. Memory Workshop (IMW) (IEEE) pp 1-3 |
Eshita T, Wang W, Nakamura K, Mihara S, Saito H, Hikosaka Y, Inoue K, Kawashima S, Yamaguchi H and Nomura K 2014 Development of ferroelectric RAM (FRAM) for mass production 2014 Joint IEEE Int. Symp. on the Applications of Ferroelectric, Int. Workshop on Acoustic Transduction Materials and Devices & Workshop on Piezoresponse Force Microscopy (IEEE) pp 1-3 |
Si M W et al 2019 A ferroelectric semiconductor field-effect transistor Nat. Electron. 2580-6 |
Ren C L et al 2020 Highly robust flexible ferroelectric field effect transistors operable at high temperature with low-power consumption Adv. Funct. Mater. 301906131 |
The Ferroelectric Memory Company 2023 One-transistor FeFET memory (available at:https://ferroelectricmemory.com/technology/one-transistor-fefet-memory/) |
Kim J Y, Choi M J and Jang H W 2021 Ferroelectric field effect transistors:progress and perspective APL Mater. 9021102 |
Wang D, Hao S L, Dkhil B, Tian B B and Duan C G 2023 Ferroelectric materials for neuroinspired computing applications Fundam. Res. (https://doi.org/10.1016/j.fmre.2023.04.013) |
Wang S Y, Liu L, Gan L R, Chen H W, Hou X, Ding Y, Ma S L, Zhang D W and Zhou P 2021 Two-dimensional ferroelectric channel transistors integrating ultra-fast memory and neural computing Nat. Commun. 1253 |
Wang L, Wang X J, Zhang Y S, Li R L, Ma T, Leng K, Chen Z, Abdelwahab I and Loh K P 2020 Exploring ferroelectric switching in α-In2Se3 for neuromorphic computing Adv. Funct. Mater. 302004609 |
Fujitsu 2023 Fujitsu launches automotive grade I2C-interface 512kbit FeRAM with 125℃ operation (available at:www.fujitsu.com/jp/group/fsm/en/products/feram/device/i2c-512k-mb85rc512ly.html) |
Ovshinsky S R 1968 Reversible electrical switching phenomena in disordered structures Phys. Rev. Lett. 211450-3 |
Le Gallo M and Sebastian A 2020 An overview of phase-change memory device physics J. Phys. D:Appl. Phys. 53213002 |
Salinga M and Wuttig M 2011 Phase-change memories on a diet Science 332543-4 |
Cappelletti P, Annunziata R, Arnaud F, Disegni F, Maurelli A and Zuliani P 2020 Phase change memory for automotive grade embedded NVM applications J. Phys. D:Appl. Phys. 53193002 |
Rathod M K 2018 Thermal Stability of Phase Change Material (IntechOpen) |
Hady F T, Foong A, Veal B and Williams D 2017 Platform storage performance with 3D XPoint technology Proc. IEEE 1051822-33 |
Wong H S P, Lee H Y, Yu S M, Chen Y S, Wu Y, Chen P S, Lee B, Chen F T and Tsai M J 2012 Metal-oxide RRAM Proc. IEEE 1001951-70 |
Ielmini D 2016 Resistive switching memories based on metal oxides:mechanisms, reliability and scaling Semicond. Sci. Technol. 31063002 |
Bernard Y, Renard V T, Gonon P and Jousseaume V 2011 Back-end-of-line compatible conductive bridging RAM based on Cu and SiO2 Microelectron. Eng. 88814-6 |
Goux L and Valov I 2016 Electrochemical processes and device improvement in conductive bridge RAM cells Phys. Status Solidi a 213274-88 |
Chang W Y, Huang H W, Wang W T, Hou C H, Chueh Y L and He J H 2012 High uniformity of resistive switching characteristics in a Cr/ZnO/Pt device J. Electrochem. Soc. 159 G29-32 |
Chen C, Gao S, Zeng F, Tang G S, Li S Z, Song C, Fu H D and Pan F 2013 Migration of interfacial oxygen ions modulated resistive switching in oxide-based memory devices J. Appl. Phys. 114014502 |
Tang G S, Zeng F, Chen C, Liu H Y, Gao S, Li S Z, Song C, Wang G Y and Pan F 2013 Resistive switching with self-rectifying behavior in Cu/SiOx/Si structure fabricated by plasma-oxidation J. Appl. Phys. 113244502 |
Liu X J, Li X M, Yu W D, Wang Q, Yang R, Cao X and Chen L D 2009 Bipolar resistance switching property of Al-Ag/La0.7Ca0.3MnO3/Pt sandwiches J. Ceram. Soc. Japan 117732-5 |
Tang G S, Zeng F, Chen C, Gao S, Fu H D, Song C, Wang G Y and Pan F 2013 Resistive switching behaviour of a tantalum oxide nanolayer fabricated by plasma oxidation Phys. Status Solidi 7282-4 |
Vasileiadis N, Loukas P, Karakolis P, Ioannou-Sougleridis V, Normand P, Ntinas V, Fyrigos I A, Karafyllidis I, Sirakoulis G C and Dimitrakis P 2021 Multi-level resistance switching and random telegraph noise analysis of nitride based memristors Chaos Solitons Fractals 153111533 |
Kim H D, An H M, Hong S M and Kim T G 2012 Unipolar resistive switching phenomena in fully transparent SiN-based memory cells Semicond. Sci. Technol. 27125020 |
Joo W J, Choi T L, Lee J, Lee S K, Jung M S, Kim N and Kim J M 2006 Metal filament growth in electrically conductive polymers for nonvolatile memory application J. Phys. Chem. B 11023812-6 |
Joo W J, Choi T L, Lee K H and Chung Y 2007 Study on threshold behavior of operation voltage in metal filament-based polymer memory J. Phys. Chem. B 1117756-60 |
Li Y B, Sinitskii A and Tour J M 2008 Electronic two-terminal bistable graphitic memories Nat. Mater. 7966-71 |
Yu S M 2014 Overview of resistive switching memory (RRAM) switching mechanism and device modeling 2014 IEEE Int. Symp. on Circuits and Systems (ISCAS) (IEEE) pp 2017-20 |
Zhao J W, Sun J, Huang H Q, Liu F J, Hu Z F and Zhang X Q 2012 Effects of ZnO buffer layer on GZO RRAM devices Appl. Surf. Sci. 2584588-91 |
Park S G et al 2012 A non-linear ReRAM cell with sub-1µA ultralow operating current for high density vertical resistive memory (VRRAM) 2012 Int. Electron Devices Meeting (IEEE) pp 20.8.1-4 |
Fujimoto M, Koyama H, Konagai M, Hosoi Y, Ishihara K, Ohnishi S and Awaya N 2006 TiO2 anatase nanolayer on TiN thin film exhibiting high-speed bipolar resistive switching Appl. Phys. Lett. 89223509 |
Lee H D, Magyari-Köpe B and Nishi Y 2010 Model of metallic filament formation and rupture in NiO for unipolar switching Phys. Rev. B 81193202 |
Yu S M and Wong H S P 2010 A phenomenological model for the reset mechanism of metal oxide RRAM IEEE Electron Device Lett. 311455-7 |
Boudsocq M, Willmann M R, McCormack M, Lee H, Shan L B, He P, Bush J, Cheng S H and Sheen J 2010 Differential innate immune signalling via Ca2+ sensor protein kinases Nature 464418-22 |
Cui X L, Ma X, Lin Q J, Li X, Zhou H and Cui X X 2020 Design of high-speed logic circuits with four-step RRAM-based logic gates Circuits Syst. Signal Process. 392822-40 |
Yu S M, Gao B, Fang Z, Yu H Y, Kang J F and Wong H S P 2013 A low energy oxide-based electronic synaptic device for neuromorphic visual systems with tolerance to device variation Adv. Mater. 251774-9 |
Dananjaya P A, Gopalakrishnan R and Lew W S 2021 RRAM-based neuromorphic computing systems Emerging Non-Volatile Memory Technologies:Physics, Engineering, and Applications ed W S Lew, G J Lim and P A Dananjaya (Springer) pp 383-414 |
Chou C C et al 2020 A 22nm 96KX144 RRAM macro with a self-tracking reference and a low ripple charge pump to achieve a configurable read window and a wide operating voltage range 2020 IEEE Symp. on VLSI Circuits (IEEE) pp 1-2 |
Pi S, Li C, Jiang H, Xia W W, Xin H L, Yang J J and Xia Q F 2019 Memristor crossbar arrays with 6-nm half-pitch and 2-nm critical dimension Nat. Nanotechnol. 1435-39 |
Luo Q et al 20178-Layers 3D vertical RRAM with excellent scalability towards storage class memory applications 2017 IEEE Int. Electron Devices Meeting (IEDM) (IEEE) pp 2.7.1-4 |
Yu S M, Deng Y X, Gao B, Huang P, Chen B, Liu X Y, Kang J F, Chen H Y, Jiang Z Z and Wong H S P 2014 Design guidelines for 3D RRAM cross-point architecture 2014 IEEE Int. Symp. on Circuits and Systems (ISCAS) (IEEE) pp 421-4 |
Govoreanu B et al 201110×10nm2 Hf/HfOx crossbar resistive RAM with excellent performance, reliability and low-energy operation 2011 Int. Electron Devices Meeting (IEEE) pp 31.6.1-4 |
Chen Y S, Wu T Y, Tzeng P J, Chen P S, Lee H Y, Lin C H, Chen F and Tsai M J 2009 Forming-free HfO2 bipolar RRAM device with improved endurance and high speed operation 2009 Int. Symp. on VLSI Technology, Systems, and Applications (IEEE) pp 37-38 |
Pan Y H, Foster P, Serb A and Prodromakis T 2021 A RRAM-based associative memory cell 2021 IEEE Int. Symp. on Circuits and Systems (ISCAS) (IEEE) pp 1-5 |
Ye C, Wu J J, Pan C H, Tsai T M, Chang K C, Wu H Q, Deng N and Qian H 2017 Boosting the performance of resistive switching memory with a transparent ITO electrode using supercritical fluid nitridation RSC Adv. 711585-90 |
Chen C Y, Goux L, Fantini A, Redolfi A, Groeseneken G and Jurczak M 2016 Doped Gd-O based RRAM for embedded application 2016 IEEE 8th Int. Memory Workshop (IMW) (IEEE) pp 1-4 |
Petzold S, Sharath S U, Lemke J, Hildebrandt E, Trautmann C and Alff L 2019 Heavy ion radiation effects on hafnium oxide-based resistive random access memory IEEE Trans. Nucl. Sci. 661715-8 |
Katti R R, Lintz J, Sundstrom L, Marques T, Scoppettuolo S and Martin D 2009 Heavy-ion and total ionizing dose (TID) performance of a 1 Mbit magnetoresistive random access memory (MRAM) 2009 IEEE Radiation Effects Data Workshop (IEEE) pp 103-5 |
Hafer C, Von Thun M, Mundie M, Bass D and Sievert F 2012 SEU, SET, and SEFI test results of a hardened 16Mbit MRAM device 2012 IEEE Radiation Effects Data Workshop (IEEE) pp 1-4 |
Honeywell 2023 HXNV016001024 k×16 non-volatile magnetic RAM (available at:https://aerospace.honeywell. com/content/dam/aerobt/en/documents/learn/products/microelectronics/datasheet/HXNV01600-G-Datasheet. pdf) |
Honeywell 2020 HXNV0640064 Mb non-volatile MRAM (available at:https://aerospace.honeywell.com/content/dam/aerobt/en/documents/learn/products/microelectronics/datasheet/HXNV06400-C.pdf) |
Katti R R, Guertin S M, Yang-Scharlotta J Y, Daniel A C and Some R 2018 Heavy ion bit response and analysis of 256 megabit non-volatile spin-torque-transfer magnetoresistive random access memory (STT-MRAM) 2018 IEEE Radiation Effects Data Workshop (REDW) (IEEE) pp 1-4 |
Yu S M, Shim W, Peng X C and Luo Y D 2021 RRAM for compute-in-memory:from inference to training IEEE Trans. Circuits Syst. I 682753-65 |
Wan W E et al 2022 A compute-in-memory chip based on resistive random-access memory Nature 608504-12 |
Torrezan A C, Strachan J P, Medeiros-Ribeiro G and Williams R S 2011 Sub-nanosecond switching of a tantalum oxide memristor Nanotechnology 22485203 |
Choi B J, Torrezan A C, Norris K J, Miao F, Strachan J P, Zhang M X, Ohlberg D A A, Kobayashi N P, Yang J J and Williams R S 2013 Electrical performance and scalability of Pt dispersed SiO2 nanometallic resistance switch Nano Lett. 133213-7 |
Sassine G et al 2018 Sub-pJ consumption and short latency time in RRAM arrays for high endurance applications 2018 IEEE Int. Reliability Physics Symp. (IRPS) (IEEE) pp P-MY.2-1-5 |
Lee M-J et al 2011 A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5-x/TaO2-x bilayer structures Nat. Mater. 10625-30 |
Yang J J, Zhang M X, Strachan J P, Miao F, Pickett M D, Kelley R D, Medeiros-Ribeiro G and Williams R S 2010 High switching endurance in TaOx memristive devices Appl. Phys. Lett. 97232102 |
Miao F, Strachan J P, Yang J J, Zhang M X, Goldfarb I, Torrezan A C, Eschbach P, Kelley R D, Medeiros-Ribeiro G and Williams R S 2011 Anatomy of a nanoscale conduction channel reveals the mechanism of a high-performance memristor Adv. Mater. 235633-40 |
Yang J J et al 2012 Engineering nonlinearity into memristors for passive crossbar applications Appl. Phys. Lett. 100113501 |
Jana D, Dutta M, Samanta S and Maikap S 2014 RRAM characteristics using a new Cr/GdOx/TiN structure Nanoscale Res. Lett. 9680 |
Lin Y-D et al 2017 Retention model of TaO/HfOx and TaO/AlOx RRAM with self-rectifying switch characteristics Nanoscale Res. Lett. 12407 |
Kim S, Abbas Y, Jeon Y R, Sokolov A S, Ku B and Choi C 2018 Engineering synaptic characteristics of TaOx/HfO2 bi-layered resistive switching device Nanotechnology 29415204 |
Kim D, Kim J and Kim S 2022 Enhancement of resistive and synaptic characteristics in tantalum oxide-based RRAM by nitrogen doping Nanomaterials 123334 |
Yang J J, Choi B J, Zhang M X, Torrezan A C, Strachan J P and Williams R S 2013 Memristive devices for computing:mechanisms, applications and challenges ECS Trans. 589 |
Lee H Y, Chen P S, Wu T Y, Chen Y S, Wang C C, Tzeng P J, Lin C H, Chen F, Lien C H and Tsai M J 2008 Low power and high speed bipolar switching with a thin reactive Ti buffer layer in robust HfO2 based RRAM 2008 IEEE Int. Electron Devices Meeting (IEEE) pp 1-4 |
Wang Y et al 2010 Investigation of resistive switching in Cu-doped HfO2 thin film for multilevel non-volatile memory applications Nanotechnology 21045202 |
Yuan F-Y et al 2017 Conduction mechanism and improved endurance in HfO2-based RRAM with nitridation treatment Nanoscale Res. Lett. 12574 |
Lin J F, Wang S L and Liu H X 2021 Multi-level switching of al-doped HfO2 RRAM with a single voltage amplitude set pulse Electronics 10731 |
Roy S et al 2020 Toward a reliable synaptic simulation using Al-doped HfO2 RRAM ACS Appl. Mater. Interfaces 1210648-56 |
Jeong H Y, Lee J Y and Choi S Y 2010 Interface-engineered amorphous TiO2-based resistive memory devices Adv. Funct. Mater. 203912-7 |
Kwon D-H et al 2010 Atomic structure of conducting nanofilaments in TiO2 resistive switching memory Nat. Nanotechnol. 5148-53 |
Borghetti J, Snider G S, Kuekes P J, Yang J J, Stewart D R and Williams R S 2010'Memristive' switches enable 'stateful' logic operations via material implication Nature 464873-6 |
Hickmott T W 1962 Low-frequency negative resistance in thin anodic oxide films J. Appl. Phys. 332669-82 |
Wu Y, Lee B and Wong H S P 2010 Al2O3-based RRAM using atomic layer deposition (ALD) with 1-µA RESET current IEEE Electron Device Lett. 311449-51 |
Kim W, Park S I, Zhang Z P, Yang-Liauw Y, Sekar D, Wong H S P and Wong S S 2011 Forming-free nitrogen-doped AlOx RRAM with sub-µA programming current 2011 Symp. on VLSI Technology-Digest of Technical Papers (IEEE) pp 22-23 |
Liang J L and Wong H S P 2010 Cross-point memory array without cell selectors-device characteristics and data storage pattern dependencies IEEE Trans. Electron Devices 572531-8 |
Huang X D, Li Y, Li H Y, Lu Y F, Xue K H and Miao X S 2020 Enhancement of DC/AC resistive switching performance in AlOx memristor by two-technique bilayer approach Appl. Phys. Lett. 116173504 |
Yu S M, Wu Y, Chai Y, Provine J and Wong H S P 2011 Characterization of switching parameters and multilevel capability in HfOx/AlOx bi-layer RRAM devices Proc. of 2011 Int. Symp. on VLSI Technology, Systems and Applications (IEEE) pp 1-2 |
Hsu C W, Wang I T, Lo C L, Chiang M C, Jang W Y, Lin C H and Hou T H 2013 Self-rectifying bipolar TaOx/TiO2 RRAM with superior endurance over 1012 cycles for 3D high-density storage-class memory 2013 Symp. on VLSI Technology (IEEE) pp T166-7 |
Zhuo V Y Q, Jiang Y and Robertson J 2014 Thermal stability investigation in highly-uniform and low-voltage tantalum oxide-based RRAM 201414th Annual Non-Volatile Memory Technology Symp. (NVMTS) (IEEE) pp 1-4 |
Zhao Y, Liu W Q, Zhao J Y, Wang Y S, Zheng J T, Liu J Y, Hong W J and Tian Z Q 2022 The fabrication, characterization and functionalization in molecular electronics Int. J. Extrem. Manuf. 4022003 |
Tsuruoka T, Terabe K, Hasegawa T, Valov I, Waser R and Aono M 2012 Effects of moisture on the switching characteristics of oxide-based, gapless-type atomic switches Adv. Funct. Mater. 2270-77 |
Ho C H, Hsu C L, Chen C C, Liu J T, Wu C S, Huang C C and Hu C M 20109nm half-pitch functional resistive memory cell with <1µa programming current using thermally oxidized sub-stoichiometric WOx film 2010 Int. Electron Devices Meeting (IEEE) pp 19.1.1-4 |
Li K S et al 2015 Study of sub-5 nm RRAM, tunneling selector and selector less device 2015 IEEE Int. Symp. on Circuits and Systems (ISCAS) (IEEE) pp 385-8 |
Zuloaga S, Liu R, Chen P Y and Yu S M 2015 Scaling 2-layer RRAM cross-point array towards 10 nm node:a device-circuit co-design 2015 IEEE Int. Symp. on Circuits and Systems (ISCAS) (IEEE) pp 193-6 |
Park K-T et al 2015 Three-dimensional 128 Gb MLC vertical NAND flash memory with 24-WL stacked layers and 50 MB/s high-speed programming IEEE J. Solid-State Circuits 50204-13 |
Kim S et al 2012 Ultrathin (<10nm) Nb2O5/NbO2 hybrid memory with both memory and selector characteristics for high density 3D vertically stackable RRAM applications 2012 Symp. on VLSI Technology (VLSIT) (IEEE) pp 155-6 |
Zhao L, Jiang Z Z, Chen H Y, Sohn J, Okabe K, Magyari-Köpe B, Wong H S P and Nishi Y 2014 Ultrathin (~2nm) HfOx as the fundamental resistive switching element:thickness scaling limit, stack engineering and 3D integration 2014 IEEE Int. Electron Devices Meeting (IEEE) pp 6.6.1-4 |
Chen Z, Zhang F F, Chen B, Zheng Y, Gao B, Liu L F, Liu X Y and Kang J F 2015 High-performance HfOx/AlOy-based resistive switching memory cross-point array fabricated by atomic layer deposition Nanoscale Res. Lett. 1070 |
Banerjee W, Xu X X, Liu H T, Lv H B, Liu Q, Sun H T, Long S B and Liu M 2015 Occurrence of resistive switching and threshold switching in atomic layer deposited ultrathin (2 nm) aluminium oxide crossbar resistive random access memory IEEE Electron Device Lett. 36333-5 |
Robayo D A, Nail C, Sassine G, Nodin J F, Bernard M, Raffay Q, Ghibaudo G, Molas G and Nowak E 2018 Statistical analysis of CBRAM endurance 2018 Int. Symp. on VLSI Technology, Systems and Application (VLSI-TSA) (IEEE) pp 1-2 |
Zhang W G, Gao H, Deng C, Lv T, Hu S, Wu H, Xue S, Tao Y, Deng L and Xiong W 2021 An ultrathin memristor based on a two-dimensional WS2/MoS2 heterojunction Nanoscale 1311497-504 |
Ma Z L, Ge J, Chen W J, Cao X C, Diao S Q, Liu Z Y and Pan S S 2022 Reliable memristor based on ultrathin native silicon oxide ACS Appl. Mater. Interfaces 1421207-16 |
Yin L, Cheng R Q, Wen Y, Zhai B X, Jiang J, Wang H, Liu C S and He J 2022 High-performance memristors based on ultrathin 2D copper chalcogenides Adv. Mater. 342108313 |
Yu S M, Chen H Y, Deng Y X, Gao B, Jiang Z Z, Kang J F and Wong H S P 20133D vertical RRAM-scaling limit analysis and demonstration of 3D array operation 2013 Symp. on VLSI Technology (IEEE) pp T158-9 |
Kang J F et al 20143D RRAM:design and optimization 201412th IEEE Int. Conf. on Solid-State and Integrated Circuit Technology (ICSICT) (IEEE) pp 1-4 |
Zhao L, Chen H Y, Wu S C, Jiang Z, Yu S, Hou T H, Wong H S P and Nishi Y 2014 Multi-level control of conductive nano-filament evolution in HfO2 ReRAM by pulse-train operations Nanoscale 65698-702 |
Gao B et al 20143D cross-point array operation on AlO y/HfOx-based vertical resistive switching memory IEEE Trans. Electron Devices 611377-81 |
An H Y, Ehsan M A, Zhou Z and Yi Y 2017 Electrical modeling and analysis of 3D synaptic array using vertical RRAM structure 201718th Int. Symp. on Quality Electronic Design (ISQED) (IEEE) pp 1-6 |
Kang J F, Gao B, Chen B, Huang P, Zhang F F, Liu X Y, Chen H Y, Jiang Z, Wong H S P and Yu S M 2014 Scaling and operation characteristics of HfOx based vertical RRAM for 3D cross-point architecture 2014 IEEE Int. Symp. on Circuits and Systems (ISCAS) (IEEE) pp 417-20 |
Wu T F et al 2018 Hyperdimensional computing exploiting carbon nanotube FETs, resistive RAM, and their monolithic 3D integration IEEE J. Solid-State Circuits 533183-96 |
Luo Q et al 2015 Demonstration of 3D vertical RRAM with ultra low-leakage, high-selectivity and self-compliance memory cells 2015 IEEE Int. Electron Devices Meeting (IEDM) (IEEE) pp 10.2.1-4 |
Li H T, Wu T F, Mitra S and Wong H S P 2017 Device-architecture co-design for hyperdimensional computing with 3D vertical resistive switching random access memory (3D VRRAM) 2017 Int. Symp. on VLSI Technology, Systems and Application (VLSI-TSA) (IEEE) pp 1-2 |
Le B Q, Grossi A, Vianello E, Wu T, Lama G, Beigne E, Wong H S P and Mitra S 2019 Resistive RAM with multiple bits per cell:array-level demonstration of 3 bits per cell IEEE Trans. Electron Devices 66641-6 |
Qin S J, Tung M, Belliveau E, Liu S H, Kwon J, Chen W C, Jiang Z Z, Wong S S and Won H S P 20228-layer 3D vertical Ru/AlOxNy/TiN RRAM with Mega-Ω Level LRS for low power and ultrahigh-density memory 2022 IEEE Symp. on VLSI Technology and Circuits (VLSI Technology and Circuits) (IEEE) pp 314-5 |
TechNavio 2022 Resistive RAM Market by Memory Type and Geography-Forecast and Analysis 2022-2026(TechNavio) |
Shen W C, Mei C Y, Chih Y D, Sheu S S, Tsai M J, King Y C and Lin C J 2012 High-K metal gate contact RRAM (CRRAM) in pure 28nm CMOS logic process 2012 Int. Electron Devices Meeting (IEEE) pp 31.6.1-4 |
Hsieh M C, Liao Y C, Chin Y W, Lien C H, Chang T S, Chih Y D, Natarajan S, Tsai M J, King Y C and Lin C J 2013 Ultra high density 3D via RRAM in pure 28nm CMOS process 2013 IEEE Int. Electron Devices Meeting (IEEE) pp 10.3.1-4 |
Xu X X, Luo Q, Gong T C, Lv H B, Long S B, Liu Q, Chung S S and Liu M 2016 Fully CMOS compatible 3D vertical RRAM with self-aligned self-selective cell enabling sub-5nm scaling 2016 IEEE Symp. on VLSI Technology (IEEE) pp 1-2 |
Hsieh E R et al 2017 A 14-nm FinFET logic CMOS process compatible RRAM flash with excellent immunity to sneak path IEEE Trans. Electron Devices 644910-8 |
Lohn A J, Stevens J E, Mickel P R, Hughart D R and Marinella M J 2013 A CMOS compatible, forming free TaOx ReRAM ECS Trans. 5859-65 |
Zhang Y, Zhao X L, Ma X L, Liu Y, Zhou X Z, Zhang M Y, Xu G W and Long S B 2022 CMOS-compatible wafer-scale Si subulate array for superb switching uniformity of RRAM with localized nanofilaments Sci. China Mater. 651623-30 |
YOLE 2021 Emerging Non-Volatile Memory Market & Technology Report 2021 |
Chou C C, Lin Z J, Tseng P L, Li C F, Chang C Y, Chen W C, Chih Y D and Chang T Y J 2018 An N40256K×44 embedded RRAM macro with SL-precharge SA and low-voltage current limiter to improve read and write performance 2018 IEEE Int. Solid-State Circuits Conf.-(ISSCC) (IEEE) pp 478-80 |
Yang C F et al 2020 Industrially applicable read disturb model and performance on mega-bit 28nm embedded RRAM 2020 IEEE Symp. on VLSI Technology (IEEE) pp 1-2 |
Peters C, Adler F, Hofmann K and Otterstedt J 2022 Reliability of 28nm embedded RRAM for consumer and industrial products 2022 IEEE Int. Memory Workshop (IMW) (IEEE) pp 1-3 |
Yoon J H, Chang M, Khwa W S, Chih Y D, Chang M F and Raychowdhury A 202129.1 a 40nm 64Kb 56.67TOPS/W read-disturb-tolerant compute-in-memory/digital RRAM macro with active-feedback-based read and in-situ write verification 2021 IEEE Int. Solid-State Circuits Conf. (ISSCC) (IEEE) pp 404-6 |
TSMC 2023 TSMC annual report 2022(available at:https://investor.tsmc.com/sites/ir/annual-report/2022/2022%20Annual%20Report-E.pdf) |
Jain P et al 2019 A 3.6Mb 10.1Mb/mm2 embedded non-volatile ReRAM macro in 22nm FinFET technology with adaptive forming/set/reset schemes yielding down to 0.5V with sensing time of 5ns at 0.7V 2019 IEEE Int. Solid-State Circuits Conf. (IEEE) pp 212-4 |
Chang Y F et al 2021 Embedded emerging memory technologies for neuromorphic computing:temperature instability and reliability 2021 IEEE Int. Reliability Physics Symp. (IRPS) (IEEE) pp 1-5 |
TechInsights 2019 Fujitsu 8 Mb 45 nm ReRAM MB85AS8MT memory floorplan analysis (available at:www.techinsights.com/products/mfr-2103-801) |
Fujitsu 2022 Fujitsu launches 12Mbit ReRAM-largest memory density in ReRAM family (available at:www.fujitsu.com/jp/group/fsm/en/products/reram/spi-12mmb85as12mt.html) |
Wei Z et al 2011 Demonstration of high-density ReRAM ensuring 10-year retention at 85℃ based on a newly developed reliability model 2011 Int. Electron Devices Meeting (IEEE) pp 31.4.1-4 |
Yoneda S et al 2018 Highly reliable ReRAM for embedded memory and beyond applications 2018 Int. Conf. on Solid State Devices and Materials (The Japan Society of. Applied Physics) |
Nanyang Technological University 2019 NTU Singapore and GLOBALFOUNDRIES Singapore to jointly explore next-gen memory technology (available at:www.ntu.edu.sg/science/news-and-events/news/detail/-ntu-singaporeand-globalfoundries-singapore-to-jointly-explore-nextgen-memory-technology) |
Dahad N 2022 Intrinsic scales RRAM for use in embedded non-volatile memory (available at:www.embedded.com/intrinsic-scales-rram-for-use-in-embedded-non-volatilememory/) |
Crossbar 2013 CrossBar to present newly-unveiled ReRAM technology at flash memory summit 2013(available at:www.crossbar-inc.com/news/press-releases/2013-08-13-crossbar-to-present-newly-unveiled-reram-technology/) |
Crossbar 2014 CrossBar to demonstrate breakthrough resistive ReRAM innovation at IEDM 2014(available at:www.crossbar-inc.com/news/press-releases/2014-12-08-crossbar-to-demonstrate-breakthrough/) |
Crossbar 2021 Resistive RAM technology utilized for physical unclonable function (PUF) cryptographic keys (available at:www.crossbar-inc.com/news/press-releases/2021-07-20-crossbar-announces-reram-based-puf-keyscopy/) |
SMIC 2016 SMIC and RRAM leader crossbar announce strategic partnership agreement (available at:www.smics. com/en/site/news_read/4569) |
Weebit Nano 2019 Weebit Nano and the Technion collaborate on "real processing in memory" project using SiOx ReRam (available at:www.weebit-nano.com/news/press-releases/weebit-nano-and-the-technion-collaborateon-real-processing-in-memory-project-using-siox-reram/) |
Weebit Nano 2020 Weebit Nano & Polimi present paper on novel AI self-learning ReRAM hardware at leading industry conference (available at:https://weebit-nano.com/wp-content/uploads/2020/07/200721-WBT-Polimi.pdf) |
Weebit Nano 2022 Major milestone toward commercialization of Weebit ReRAM at SkyWater lays groundwork for customers to confidently design innovative and highly differentiated SoCs (available at:www.weebitnano.com/news/press-releases/weebit-nano-receives-fromskywater-technology-the-first-silicon-wafersmanufactured-with-embedded-weebit-reram-rram/) |
Weebit Nano 2018 Weebit Nano achieves 40nm working SiOx ReRAM cells milestone one month ahead of schedule (available at:https://weebit-nano.com/wpcontent/uploads/2018/06/27.11.17.pdf) |
Weebit Nano 2018 Weebit Nano reaches silicon oxide ReRAM 1Mb array at 40nm milestone (available at:https://weebit-nano.com/wp-content/uploads/2018/06/25.6.18.pdf) |
Weebit Nano 2020 Weebit Nano to showcase neuromorphic demo at ISSCC 2020(available at:www.weebit-nano.com/news/press-releases/weebit-nano-to-showcaseneuromorphic-demo-at-isscc-2020/) |
Weebit Nano 2022 Weebit ReRAM results:high temperature stability at 28nm (available at:www.weebit-nano.com/weebit-reram-results-high-temperature-stability-at-28nm/) |
Weebit Nano 2023 Weebit ReRAM in 22nm FD-SOI process provides cost-effective, reliable embedded NVM for IoT, edge AI and other ultra-low power applications (available at:www.weebit-nano.com/news/press-releases/weebitnano-tapes-out-first-22nm-demo-chip-reram-rramembedded-nvm-for-iot-ai-applications/) |
Weebit Nano 2021 Weebit Nano demonstrates integration of selector with ReRAM cell for stand-alone memory market (available at:https://embeddedcomputing.com/technology/storage/weebit-nano-demonstrates-integrationof-selector-with-reram-cell-for-stand-alone-memorymarket) |
Xiao B J 2012 FPGA-RR:A Novel FPGA Architecture with RRAM-Based Reconfigurable Interconnects (University of California) |
Kumar K, Ramkumar K R and Kaur A 2020 A design implementation and comparative analysis of advanced encryption standard (AES) algorithm on FPGA 20208th Int. Conf. on Reliability, Infocom Technologies and Optimization (Trends and Future Directions) (ICRITO) (IEEE) pp 182-5 |
Tanachutiwat S, Liu M and Wang W 2011 FPGA based on integration of CMOS and RRAM IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 192023-32 |
Cong J and Xiao B J 2014 FPGA-RPI:a novel FPGA architecture with RRAM-based programmable interconnects IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 22864-77 |
Bai X et al 2022 Via-switch FPGA:65-nm CMOS implementation and evaluation IEEE J. Solid-State Circuits 572250-62 |
Han K J et al 2007 A novel flash-based FPGA technology with deep trench isolation 200722nd IEEE NonVolatile Semiconductor Memory Workshop (IEEE) pp 32-33 |
Paul S, Mukhopadhyay S and Bhunia S 2008 Hybrid CMOS-STTRAM non-volatile FPGA:design challenges and optimization approaches 2008 IEEE/ACM Int. Conf. on Computer-Aided Design (IEEE) pp 589-92 |
Chen Y B, Zhao J S and Xie Y 20103D-NonFAR:three-dimensional non-volatile FPGA architecture using phase change memory Proc. 2010 ACM/IEEE Int. Symp. on Low-Power Electronics and Design (IEEE) pp 55-60 |
Zambelli C, Castellari M, Olivo P and Bertozzi D 2018 Correlating power efficiency and lifetime to programming strategies in RRAM-based FPGAs 2018 New Generation of CAS (NGCAS) (IEEE) pp 21-24 |
Lee K, Kan J J and Kang S H 2014 Unified embedded non-volatile memory for emerging mobile markets Proc. 2014 IEEE/ACM Int. Symp. on Low Power Electronics and Design (IEEE) pp 131-6 |
Chien T K, Chiou L Y, Sheu S S, Lin J C, Lee C C, Ku T K, Tsai M J and Wu C I 2016 Low-power MCU with embedded ReRAM buffers as sensor hub for IoT applications IEEE J. Emerg. Sel. Top. Circuits Syst. 6247-57 |
Jameson J R et al 2018 Towards automotive grade embedded RRAM 201848th European Solid-State Device Research Conf. (ESSDERC) (IEEE) pp 58-61 |
Ito S et al 2018 ReRAM technologies for embedded memory and further applications IEEE Int. Memory Workshop (IMW) (IEEE) pp 1-4 |
Strenz R 2020 Review and outlook on embedded NVM technologies-from evolution to revolution 2020 IEEE Int. Memory Workshop (IMW) (IEEE) pp 1-4 |
Jiang H W, Huang S S, Peng X C and Yu S M 2020 MINT:mixed-precision RRAM-based in-memory training architecture 2020 IEEE Int. Symp. on Circuits and Systems (ISCAS) (IEEE) pp 1-5 |
Lu A N, Peng X C, Li W T, Jiang H W and Yu S M 2021 NeuroSim validation with 40nm RRAM compute-in-memory macro 2021 IEEE 3rd Int. Conf. on Artificial Intelligence Circuits and Systems (AICAS) (IEEE) pp 1-4 |
Yoon J H, Chang M, Khwa W S, Chih Y D, Chang M F and Raychowdhury A 2022 A 40-nm, 64-kb, 56.67 TOPS/W voltage-sensing computing-in-memory/digital RRAM macro supporting iterative write with verification and online read-disturb detection IEEE J. Solid-State Circuits 5768-79 |
Dong Q, Sinangil M E, Erbagci B, Sun D, Khwa W S, Liao H J, Wang Y and Chang J 202015.3 A 351TOPS/W and 372.4GOPS compute-in-memory SRAM macro in 7nm FinFET CMOS for machine-learning applications 2020 IEEE Int. Solid-State Circuits Conf.-(ISSCC) (IEEE) pp 242-4 |
Yan B N, Li B, Qiao X M, Xue C X, Chang M F, Chen Y R and Li H 2019 Resistive memory-based in-memory computing:from device and large-scale integration system perspectives Adv. Intell. Syst. 11900068 |
Pyo Y, Woo J U, Hwang H G, Nahm S and Jeong J 2021 Effect of oxygen vacancy on the conduction modulation linearity and classification accuracy of Pr0.7Ca0.3MnO3 memristor Nanomaterials 112684 |
Li C et al 2018 Analogue signal and image processing with large memristor crossbars Nat. Electron. 152-59 |
Jiang H W, Li W T, Huang S S and Yu S M 2022 A 40nm analog-input ADC-free compute-in-memory RRAM macro with pulse-width modulation between sub-arrays 2022 IEEE Symp. on VLSI Technology and Circuits (VLSI Technology and Circuits) (IEEE) pp 266-7 |
Sun X Y, Liu R, Peng X C and Yu S M 2018 Computing-in-memory with SRAM and RRAM for binary neural networks 201814th IEEE Int. Conf. on Solid-State and Integrated Circuit Technology (ICSICT) (IEEE) pp 1-4 |
Lu A N, Peng X C and Yu S M 2021 Compute-in-RRAM with limited on-chip resources 2021 IEEE 3rd Int. Conf. on Artificial Intelligence Circuits and Systems (AICAS) (IEEE) pp 1-4 |
Wang N, Zhang J N, Liu Z Y, Ding C, Sui G R, Jia H Z and Gao X M 2021 An enhanced thermoelectric collaborative cooling system with thermoelectric generator serving as a supplementary power source IEEE Trans. Electron Devices 681847-54 |
Singh A, Bishnoi R, Joshi R V and Hamdioui S 2022 Referencing-in-array scheme for RRAM-based CIM architecture 2022 Design, Automation & Test in Europe Conf. & Exhibition (DATE) (IEEE) pp 1413-8 |
Li W T, Huang S S, Sun X Y, Jiang H W and Yu S M 2021 Secure-RRAM:a 40nm 16kb compute-in-memory macro with reconfigurability, sparsity control, and embedded security 2021 IEEE Custom Integrated Circuits Conf. (CICC) (IEEE) pp 1-2 |
Theis T N and Wong H S P 2017 The end of Moore's law:a new beginning for information technology Comput. Sci. Eng. 1941-50 |
Ielmini D and Milo V 2017 Physics-based modeling approaches of resistive switching devices for memory and in-memory computing applications J. Comput. Electron. 161121-43 |
Zhu Y X, Mao H W, Zhu Y, Wang X J, Fu C Y, Ke S, Wan C J and Wan Q 2023 CMOS-compatible neuromorphic devices for neuromorphic perception and computing:a review Int. J. Extrem. Manuf. 5042010 |
Sequeira C 2022 Electropolymerization for neuromorphic engineering Encyclopedia (available at:https://encyclopedia.pub/entry/27046) |
Maass W 1997 Fast sigmoidal networks via spiking neurons Neural Comput. 9279-304 |
Cao Y Q, Chen Y and Khosla D 2015 Spiking deep convolutional neural networks for energy-efficient object recognition Int. J. Comput. Vis. 11354-66 |
Hodgkin A L and Huxley A F 1952 A quantitative description of membrane current and its application to conduction and excitation in nerve J. Physiol. 117500-44 |
Guo Y L, Wu H Q, Gao B and Qian H 2019 Unsupervised learning on resistive memory array based spiking neural networks Front. Neurosci. 13812 |
Izhikevich E M 2003 Simple model of spiking neurons IEEE Trans. Neural Netw. 141569-72 |
Van De Burgt Y and Gkoupidenis P 2020 Organic materials and devices for brain-inspired computing:from artificial implementation to biophysical realism MRS Bull. 45631-40 |
Abbott L F 1999 Lapicque's introduction of the integrate-and-fire model neuron (1907) Brain Res. Bull. 50303-4 |
Indiveri G et al 2011 Neuromorphic silicon neuron circuits Front. Neurosci. 573 |
Park J, Lee J and Jeon D 2020 A 65-nm neuromorphic image classification processor with energy-efficient training through direct spike-only feedback IEEE J. Solid-State Circuits 55108-19 |
Seo J S et al 2011 A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons 2011 IEEE Custom Integrated Circuits Conf. (CICC) (IEEE) pp 1-4 |
Yu Q, Tang H J, Tan K C and Li H Z 2013 Precise-spike-driven synaptic plasticity:learning hetero-association of spatiotemporal spike patterns PLoS One 8 e78318 |
Lu J K, Wei J S, An J J, Zhang C G, Shi T and Liu Q 2021 RRAM-based analog-weight spiking neural network accelerator with in-situ learning for IoT applications 2021 IEEE 14th Int. Conf. on ASIC (ASICON) (IEEE) pp 1-4 |
Lee M K F, Cui Y N, Somu T, Luo T, Zhou J, Tang W T, Wong W F and Goh R S M 2019 A system-level simulator for RRAM-based neuromorphic computing chips ACM Trans. Archit. Code Optim. 1564 |
Pickett M D, Medeiros-Ribeiro G and Williams R S 2013 A scalable neuristor built with Mott memristors Nat. Mater. 12114-7 |
Zhang Y S et al 2018 Highly compact artificial memristive neuron with low energy consumption Small 141802188 |
Duan Q X, Jing Z K, Zou X L, Wang Y H, Yang K, Zhang T, Wu S, Huang R and Yang Y C 2020 Spiking neurons with spatiotemporal dynamics and gain modulation for monolithically integrated memristive neural networks Nat. Commun. 113399 |
Shaban A, Bezugam S S and Suri M 2021 An adaptive threshold neuron for recurrent spiking neural networks with nanodevice hardware implementation Nat. Commun. 124234 |
Mostafa H, Khiat A, Serb A, Mayr C G, Indiveri G and Prodromakis T 2015 Implementation of a spike-based perceptron learning rule using TiO2-x memristors Front. Neurosci. 9357 |
Berdan R, Vasilaki E, Khiat A, Indiveri G, Serb A and Prodromakis T 2016 Emulating short-term synaptic dynamics with memristive devices Sci. Rep. 618639 |
Wang Z R et al 2017 Memristors with diffusive dynamics as synaptic emulators for neuromorphic computing Nat. Mater. 16101-8 |
Zhang Y S, Zhong S, Song L, Ji X L and Zhao R 2018 Emulating dynamic synaptic plasticity over broad timescales with memristive device Appl. Phys. Lett. 113203102 |
Zhang W Q, Gao B, Tang J S, Yao P, Yu S M, Chang M F, Yoo H J, Qian H and Wu H Q 2020 Neuro-inspired computing chips Nat. Electron. 3371-82 |
Shafiee A, Nag A, Muralimanohar N, Balasubramonian R, Strachan J P, Hu M, Williams R S and Srikumar V 2016 ISAAC:a convolutional neural network accelerator with in-situ analog arithmetic in crossbars ACM SIGARCH Comput. Archit. News 4414-26 |
Song L H, Qian X H, Li H and Chen Y R 2017 PipeLayer:a pipelined ReRAM-based accelerator for deep learning 2017 IEEE Int. Symp. on High Performance Computer Architecture (HPCA) (IEEE) pp 541-52 |
Xia L X, Liu M Y, Ning X F, Chakrabarty K and Wang Y 2019 Fault-tolerant training enabled by on-line fault detection for RRAM-based neural computing systems IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 381611-24 |
Zhang J, Ding Y Q, Xue X Y, Gang J, Wu Y X, Xie Y F and Lin Y Y 2009 A 3D RRAM using stackable 1TXR memory cell for high density application 2009 Int. Conf. on Communications, Circuits and Systems (IEEE) pp 917-20 |
Cheng M, Xia L X, Zhu Z H, Cai Y, Xie Y, Wang Y and Yang H Z 2017 TIME:a training-in-memory architecture for memristor-based deep neural networks Proc. 54th ACM/EDAC/IEEE Design Automation Conf. (IEEE) pp 1-6 |